The present invention relates to a semiconductor device and method of manufacturing the same, a circuit board, and an electronic instrument.
Conventionally, it is known for a semiconductor device to have a substrate on which an interconnect pattern is formed (an interposer), and to have a semiconductor chip mounted on the interposer. With increasing miniaturization of semiconductor devices and increasing pin counts, the interconnect pattern is required to be even finer, but there are limits to the degree to which the interconnect pattern formed on a single interposer can be made finer. In addition, multi-layer substrates are expensive.
In this case, by using a plurality of interposers, increasing pin counts can be supported. For example, a stack type of semiconductor device has been developed, having a construction in which a plurality of interposers is adhered together, with semiconductor chips mounted on one side or both sides.
As a published example may be cited Japanese Patent Publication No. 2870530, in which by means of bumps, interconnect patterns formed on the upper and lower interposers are electrically connected together. However, with this method, the formation of the bumps involves time and cost, and this is a problem.
The present invention solves the above described problem, and has as its object the provision of a semiconductor device and method of manufacture thereof, a circuit board and an electronic instrument in which the substrates are electrically connected with a simple construction.
(1) A semiconductor device of the present invention comprises:
a plurality of substrates which have interconnect patterns and are disposed so as to be overlaid; and
a semiconductor chip mounted on at least one of the substrates;
wherein a first interconnect pattern formed on a first substrate which is one of two substrates included in the plurality of overlaid substrates has at least one bent portion which projects from a surface of the first substrate; and
wherein the bent portion is electrically connected to at least one flat portion of a second interconnect pattern formed on a second substrate of the two substrates.
The bent portion is formed by a portion of the first interconnect pattern projecting from the surface of the first substrate, and has a simple construction. Since the electrical connection between the two substrates is achieved by means of the bent portion, the formation of bumps is not required.
(2) In this semiconductor device, a through hole may be formed in the first substrate, and the bent portion may enter the through hole and project from a surface of the first substrate opposite to the surface on which the first interconnect pattern is formed.
By means of this, the first interconnect pattern is formed on the surface of the first substrate opposite to that from which the bent portion projects. Therefore, since the first substrate is interposed between the first and second interconnect patterns, short-circuits between the two can be prevented.
(3) In this semiconductor device,
a through hole may be formed in the first substrate; and
the bent portion may be positioned over the through hole and project from the surface of the first substrate on which the first interconnect pattern is formed.
By means of this, since the bent portion projects from the surface of the first substrate on which the first interconnect pattern is formed, the bent portion can be formed to be higher than the surface of the first substrate.
(4) In this semiconductor device, a plurality of the bent portions may be formed within or over the through hole.
By means of this, it is sufficient to form one through hole corresponding to a plurality of bent portions.
(5) In this semiconductor device,
a plurality of the through holes may be formed in the first substrate;
a plurality of the bent portions may be formed in the first interconnect pattern; and
each of the bent portions may be formed so as to be positioned over one of the through holes.
By means of this, since the material of the first substrate is present between adjacent bent portions, short-circuits between the bent portions can be prevented.
(6) In this semiconductor device, the second interconnect pattern may be formed on a surface of the second substrate on the side of the first substrate.
By means of this, since the second interconnect pattern is close to the first substrate, even if the bent portions are low, the electrical connection to the flat portion is possible.
(7) In this semiconductor device,
the second interconnect pattern may be formed on a surface of the second substrate opposite to the surface of the second substrate which faces to the first substrate; and
the bent portion may be electrically connected to the second interconnect pattern through the through hole formed in the second substrate.
By means of this, because the second substrate is interposed between the first and second interconnect patterns, short-circuits between the two are prevented.
(8) In this semiconductor device,
the semiconductor chip may be provided between the first and second substrates; and
the bent portion may project to the side of the semiconductor chip, and be formed to be higher than the semiconductor chip.
By means of this, without impeding the presence of the semiconductor chip, the electrical conduction between the first and second substrates can be assured. By means of the bent portions, a space greater than the height of the semiconductor chip can be provided between the first and second substrates, and separate provision of a spacer for maintaining the spacing is not required.
(9) In this semiconductor device, the semiconductor chip may be provided on each of the first and second substrates.
This is a stack type of semiconductor device having a plurality of overlaid semiconductor chips.
(10) In this semiconductor device, the semiconductor chip may be provided on one of the first and second substrates.
By means of the first and second interconnect patterns, a multi-layer interconnect can be formed.
(11) In this semiconductor device,
the number of the substrates provided to be overlaid may be three or more;
a central substrate of the three substrates may be the first substrate, and the bent portions may project from both surfaces of the first substrate; and
outer substrates of the three substrates maybe the second substrate.
By means of this, the bent portions of the interconnect pattern formed on the central substrate are electrically connected to the flat portion of the interconnect patterns formed on the outer substrates.
(12) In this semiconductor device,
the number of the substrates provided to be overlaid may be three or more; and
a central substrate of the three substrates may be the second substrate, and outer substrates may be the first substrate.
By means of this, the flat portion of the interconnect pattern formed on the central substrate is electrically connected to the bent portions of the interconnect patterns formed on the outer substrates.
(13) In this semiconductor device,
the number of the substrates provided to be overlaid may be three or more;
one of two outer substrates of the overlaid substrates may be the first substrate, and the other may be the second substrate; and
at least one center substrate of the overlaid substrates may have the bent portion and the flat portion, and may be the first substrate with respect to one of the two outer substrates, and may be the second substrate with respect to the other of the two outer substrates.
By means of this, the center substrate is constituted to function as both the first and second substrates.
(14) A circuit board of the present invention has the above described semiconductor device mounted.
(15) An electronic instrument of the present invention has the above described semiconductor device.
(16) A method of manufacture of a semiconductor device of the present invention comprises the steps of:
mounting a semiconductor chip on at least one of a plurality of substrates having interconnect patterns;
providing the substrates so as to be overlaid; and
electrically connecting two substrates of the overlaid substrates;
wherein a first interconnect pattern formed on a first substrate of the two substrates has a bent portion which projects from a surface of the first substrate; and
wherein the bent portion is electrically connected to a flat portion of a second interconnect pattern formed on a second substrate of the two substrates.
According to the present invention, the bent portion is formed by a portion of the first interconnect pattern projecting from the surface of the first substrate, and have a simple construction. Since the electrical connection between the two substrates is achieved by means of the bent portion, the formation of bumps is not required.
(17) In this method of manufacture of a semiconductor device, the plurality of substrates may be positioned with the outer form of the substrates as a reference.
(18) In this method of manufacture of a semiconductor device, the plurality of substrates maybe positioned with holes formed in the substrates as a reference.
(19) In this method of manufacture of a semiconductor device, at least one of pressure and heat may be applied to the bent portion to electrically connect the bent portion to the flat portion.
(20) In this method of manufacture of a semiconductor device,
the bent portion may be formed on each of the interconnect patterns formed on the substrates; and
the bent portion formed on each of the substrates may be electrically connected to the flat portion in a single operation.
By means of this, the electrical connection of the plurality of bent portions and the plurality of flat portions can be carried out in a single operation, and the process can be made shorter.